LegUp Computing has been Acquired by Microchip Technology

Oct 21, 2020 Update: Official Press Release from Microchip

We are excited to announce that LegUp Computing has been acquired by Microchip Technology!

We have partnered with Microchip over the past few years to enable a software design entry for Microchip FPGAs. LegUp HLS has been customer-proven for Microchip FPGAs and supports their SmartFusion2, PolarFire, and most recently, PolarFireSoC FPGAs.

The whole team is excited for this next step to join the Microchip team and help simplify FPGA programming for their customers with our LegUp HLS software.

The LegUp management would like to thank the whole team at LegUp Computing for the hard work over the past 5 years. Also thanks to all the support from the University of Toronto, UTEST, our investors at Intel Capital, and all of our other contributors over the years. We really appreciate your effort and support.

We are very excited to join Microchip and continue our vision of making FPGAs easier to program!

LegUp 8.1 Release

We are excited to announce that LegUp 8.1 has been released! You can download LegUp here.

Release Notes

New features and enhancements for this release:

  • Improved support for processor-accelerator hybrid flow for Microchip’s PolarFireSoC FPGA. LegUp can generate a RISC-V SoC with LegUp accelerator for PolarFireSoC.
  • Enhanced data transfer between the LegUp accelerators and processor/main memory. More details can be found in our user guide.
  • Improved memory-partition for better data bandwidth and accelerator performance.
  • Automatically insert synthesis attributes to guide the RTL synthesis tool’s block RAM inference based on user-specified µSRAM/LSRAM resource constraints.
  • Various QoR improvements and bug fixes.
  • Reduced LegUp compile time.

Pricing

LegUp 8.1 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at sales@legupcomputing.com.

Download

You can download LegUp here.

LegUp 8.0 Release

We are excited to announce that LegUp 8.0 has been released! You can download LegUp here.

Release Notes

New features and enhancements for this release:

  • LegUp now supports Achronix’s new 7nm Speedster7t FPGA. LegUp is ready for production use for Achronix FPGAs
  • Beta support for processor-accelerator hybrid flow for Microchip’s PolarFireSoC FPGA. LegUp can now generate a RISC-V SoC with LegUp accelerator for PolarFireSoC.
  • Full floating-point support for all vendors (Intel, Xilinx, Microchip, Achronix, and Lattice)
  • Complete support for arbitrary bit-width integer/fixed-point libraries for all vendors
  • DSP tech mapping to generate optimized hardware for target FPGA
  • Line buffer library for image processing (documentation)
  • Reduced LegUp compile time for pipelining by up to 80%
  • Various QoR improvements and bug fixes

Pricing

LegUp 8.0 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at sales@legupcomputing.com.

Download

You can download LegUp here.

LegUp 7.5 Release

We are excited to announce that LegUp 7.5 has been released! You can download LegUp here.

Release Notes

New features and enhancements for this release:

  • Improved runtime for pipelining
    • Reduced runtime by up to 90% for large complex pipelined designs
  • Improved C++ Arbitrary Precision Fixed-Point Library
    • Fixed point numbers can now be shifted arbitrarily with respect to the decimal point, leading to more efficient hardware
  • Various bug fixes

Pricing

LegUp 7.5 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at sales@legupcomputing.com.

Download

You can download LegUp here.

LegUp 7.4 Release

We are excited to announce that LegUp 7.4 has been released! You can download LegUp here.

Release Notes

New features, enhancements and bug fixes for this release:

  • C++ Arbitrary Precision Fixed-Point Library
    • Users can now express their computations in fixed-point, which can significantly reduce resource usage and improve speed compared to floating-point computations
    • An FIR Filter example which makes use of the arbitrary fixed-point library is included with the LegUp installation and can be found in the LegUp GUI
  • Added support for generic multiplier IP to utilize internal registers in DSP blocks for improved Fmax
    • LegUp supports multiple FPGA vendors, but we found that some FPGA synthesis tools were not able to properly utilize the internal DSP registers with the previously generated Verilog style
    • The new generic multiplier IP can utilize the internal registers properly, which can lead to significantly improved Fmax. Please refer to the user guide on how this can be used.
  • Improve error message handling for generating AXI interfaces

Pricing

LegUp 7.4 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at sales@legupcomputing.com.

Download

You can download LegUp here.

System C Support in LegUp

High-level synthesis using C++ works very well for designers describing data-flow applications like digital signal processing or video/image processing. But for certain control heavy applications, such as a bus controller, a designer will have trouble describing the cycle accurate behavior of the hardware in C++. We decided to help fix this problem by adding support for System C as an input language to LegUp HLS.

System C is a standard C++ library that allows a designer to specify cycle-accurate behavior. Typically System C is used for system-level modeling of a larger system. System C offers the advantage of faster simulation time than running RTL simulations while still being able to measure cycle-accurate behavior.

System C explicitly describes the cycle behavior of the application. There is no flexibility for the operations to be scheduled into different clock cycles like when C++ is used in LegUp HLS. This provides the user with very fine-grained control over the behavior of the generated hardware.

AHB-Lite Bus Slave Controller Example

For an example of a control-heavy application, we will implement a simplified AHB-Lite bus slave controller in System C. We will focus on how to implement the part of the bus protocol that requires cycle-accurate control: the error response code.

For background, the AHB-Lite bus protocol has two possible responses (HRESP) from the slave to the master. First, if the transaction was successful the HRESP will be OKAY (0) but if there was an error there will be a two cycle delay and HRESP will be ERROR (1). See the waveforms below:

AHB-Lite HRESP Error
Figure 1: AHB-Lite HRESP Error Response (Image source: AMBA 3 AHB-Lite 1.0 Spec)

 

The 2-cycle delay behavior when an error occurs is hard for a designer to express in typical LegUp HLS C++ code. But with System C, we can use the wait() function to introduce a 1-cycle delay.

LegUp 7.3 Release

We are excited to announce that LegUp 7.3 has been released! You can download LegUp here.

Release Notes

New features, enhancements and bug fixes for this release:

  • Added alpha support for System C. Check out our blog post for more details.
  • Added support for ap_int type (arbitrary bitwidth for signed integers, previously only unsigned integers were supported for arbitrary bitwidth)
  • Improvements to the LegUp GUI
  • Various bug fixes.

Pricing

LegUp 7.3 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at sales@legupcomputing.com.

Download

You can download LegUp here.

LegUp 7.2 Release

We are excited to announce that LegUp 7.2 has been released! You can download LegUp here.

Release Notes

New features, enhancements and bug fixes for this release:

  • Added support to use Xilinx’s XSIM simulator for Hardware simulation and Software/Hardware co-simulation.
  • Integrated Xilinx LogiCORE Floating-Point Operator IPs for implementing floating-point operations on Xilinx FPGAs.
    • The two features above are only available when targeting Xilinx devices, and require users to install the Vivado design suite separately.
  • Various bug fixes.

Pricing

LegUp 7.2 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at sales@legupcomputing.com.

Download

You can download LegUp here.

LegUp Booth at the Design Automation Conference (DAC 2019)

LegUp will be exhibiting at the Design Automation Conference (DAC) in Las Vegas, Nevada from June 3-5. Come visit us at booth number 1127!

We will be showcasing LegUp’s industry leading high-level synthesis software and talking about the next generation of our tools. We will also have live computer vision demonstrations designed with LegUp HLS and targeting various FPGA devices.

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More updates to come next week!

LegUp Computing presents at Intel Capital Summit

Andrew Canis our CEO attended the Intel Capital Summit in April, 2019 and he gave an elevator pitch talking about LegUp Computing. We really appreciate all the support from our investor Intel Capital.

Check out the video below:

LegUp Computing Inc. provides an integrated development environment that enables hardware designers to program any FPGA device in C/C++ for greater productivity and easier verification.

Please contact us at info@legupcomputing.com if you’re interested in hearing more!