Andrew Canis is a leading expert in high-level synthesis for FPGAs, the task of compiling software into digital hardware. During his Ph.D. at the University of Toronto, he helped lead the effort to build LegUp, an open-source academic high-level synthesis tool that has become the de facto standard for state-of-the-art HLS research. He has co-authored over 10 peer-reviewed research papers focusing on high-level synthesis for FPGAs. After completing his Ph.D. in 2015, he has been CEO and co-founder at LegUp Computing with the aim to commercialize LegUp and make FPGAs easier to program. He has previously worked on circuit EDA research at Altera, Sun Microsystems Labs, and Oracle Labs.

Jongsok (James) Choi is an expert in high-level synthesis and hardware/software co-design. He has been working with FPGAs since 2008, where he has co-authored 15 top-tier conference/journal publications and a book chapter in the area of high-level synthesis, automatic System-on-Chip (SoC) design, and automatic synthesis of multi-threaded software to parallel hardware. He received his Ph.D degree in Computer Engineering in 2016 and his M.A.Sc. degree in 2012, both from the University of Toronto. Jongsok has previously worked at Intel, Qualcomm, Marvell Semiconductor, STMicroelectronics, and Blackberry.

Ruo Long (Lanny) Lian received the M.A.Sc degree in computer engineering in 2016 from the University of Toronto, where his research centered on streaming circuit synthesis and FPGA-based acceleration of neural network computation. Ruolong has interned at Altera, implementing high-speed ethernet transceiver IPs, and also at Google, working on large-scale data processing solutions. He received the Bell Graduate Scholarship during his M.A.Sc study.

Jason Anderson is a Professor with the Department of Electrical and Computer Engineering, U of T, and holds the Jeffrey Skoll Endowed Chair. He joined the Field-Programmable Gate Array (FPGA) Implementation Tools Group, Xilinx, Inc., San Jose, CA, USA, in 1997, where he was involved in placement, routing, and synthesis. He became a Principal Engineer at Xilinx in 2007 and joined the university in 2008. His research interests are all aspects of tools, architectures, and circuits for FPGAs. He has co-authored over 80 peer-reviewed research publications, holds 27 U.S. patents and is Program Co-Chair for FPL 2016 and Program Chair for ACM FPGA 2017.

Gan Yang received his Bachelor's degree in Computer Engineering in 2019 from University of Toronto. Prior to joining LegUp Computing, he also interned at Qualcomm Canada, doing GPU performance analysis, modifying static and dynamic simulation models, and developing infrastructure for a convolutional neural network accelerator.

Muhammad R. Soliman received his Ph.D. degree in Computer Engineering in 2019 from the University of Waterloo and his M.A.Sc degree in 2013 from Cairo University. His research focused on real-time systems, compiler optimization, and NoC design. He co-authored 4 peer-reviewed publications. He is experienced with FPGA design and software development. He has participated in teaching embedded systems and hardware/software design courses at Cairo University and the University of Waterloo between 2010 and 2019.

Weiyu (Michael) Zhao received his B.A.Sc degree in Computer Engineering in 2020 from the University of Toronto where he focused on computer hardware, FPGAs and networking. Weiyu worked on numerous research projects at the University of Toronto as an undergraduate student. Notable projects included: research on physical layer switching with Professor Paul Chow and his student Clark Shen, and topology-based cloud management with Professor Alberto Leon-Garcia and his student Thomas Lin. Weiyu has also interned at Xilinx, where he worked on infrastructure and development for high-speed transceivers.

Minh Tue Pham received his Bachelor’s degree in Computer Engineering in 2020 from the University of Toronto, with a major in Artificial Intelligence. Tue worked on research applying machine learning to visual scanning patterns with Professor Moshe Eizenman. Tue's design project implemented a sign language translation system on an FPGA under Professor Jason Anderson. He was a Software Engineer intern at Intel where he worked on the OpenCL FPGA compiler. He focused on the performance of the OpenCL runtime, development and testing infrastructure for OpenCL example designs, and backwards compatibility.

David Ma received his M. Eng degree in Computer Engineering in 2020 from the University of Toronto and his Bachelor's degree in 2019 at UBC. In both degrees, his work was focused on FPGA design and software engineering. During his M. Eng David worked for Professor Jason Anderson, researching the effect of latency-insensitive circuits in CGRAs. David has also previously worked at Intel, developing both firmware and hardware for SSD controllers.

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