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Achieve higher performance and lower power with LegUp!


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    LegUp is a state-of-the-art high-level synthesis (HLS) compiler which automatically generates high-performance FPGA hardware from software. Hardware implemented on an FPGA can provide 10X improvement in performance and energy-efficiency compared to software executing on a processor. However, FPGA hardware design can be extremely difficult and time consuming, even for expert hardware designers. For software engineers, FPGAs have been simply inaccessible. LegUp opens the doors for software engineers to use FPGAs and reap the performance and energy-efficiency benefits FPGAs have to offer. By raising the design abstraction to software, LegUp also significantly reduces the design time, leading to shorter time-to-market. Use LegUp to obtain higher performance, better energy-efficiency, and faster time-to-market for your application!


Generate a Hardware IP Core or
a complete System-on-Chip from C.

LegUp can compile your C program into hardware, which can operate as a stand-alone component or can be integrated into a larger system to provide hardware acceleration and energy savings. However, not all program segments may be amenable for hardware acceleration, and some parts of the program can be better suited to remain in software. To this end, LegUp can also compile your program into an ARM Processor-Accelerator SoC (System-on-Chip), where the compute-intensive functions are accelerated in hardware, and the remaining program segments are executed in software on the ARM processor. The software/hardware partitioning, as well as the generation of the system interconnect, are all automatically handled by LegUp.

Multi-threaded Software to
Parallel Hardware.

LegUp supports hardware synthesis of Pthreads and OpenMP, which are popular multi-threading methodologies in software. In software, Pthreads and OpenMP are used to express parallelism, where multiple threads get compiled to execute concurrently on multiple processor cores. LegUp can take Pthreads and OpenMP code, and without requiring any code changes, produce multiple hardware cores that execute concurrently. This is a unique feature of LegUp that is not available in any other HLS tool. By automatically compiling parallel software threads to parallel hardware, LegUp enables those without hardware knowledge to take advantage of parallel FPGA hardware!

Vendor-agnostic HLS Solution.

Some FPGA vendors offer their own HLS tools, however, an application designed with a vendor HLS tool is tied to the particular vendor and cannot be used for any other vendors. In addition, porting an HLS design from one tool to another can be difficult and time-consuming, as each tool uses different constraints, pragmas, and API functions. As HLS algorithms are also different, a design that produced good results in one tool may produce poor results in another, leading to lots of re-implementation and increasing design time and costs. LegUp is vendor-agnostic and is the only tool that can work for Intel, Xilinx, Lattice, Microsemi, and Achronix FPGAs. The same HLS design can be synthesized for any FPGA vendor so you never have to re-implement your design. Our state-of-the-art algorithms will automatically optimize the design for your target FPGA to save you time and costs.


Orders of Magnitude Improvements Compared to Software on Processors.

LegUp has been shown to produce FPGA hardware that can provide orders of magnitude improvements in speed and energy-efficiency compared to software running on a state-of-the-art processor, such as an Intel i7 or a multi-core ARM. Users can take the same software running on a processor and compile to FPGA hardware using LegUp to achieve better performance and enery-efficiency.

State-of-the-Art Loop Pipelining.

Loops in software are typically performance hot spots, where a majority of the runtime is spent. Loop pipelining, which allows multiple loop iterations to execute concurrently, is crucial for high performance. LegUp has been shown to produce better loop pipelining hardware than other commercial HLS tools.


Type 30-Day Trial Version Full Licensed Version
Supported OS Windows and Linux 64-bit Windows and Linux 64-bit
Pthread Support
OpenMP Support Linux Only Linux Only
Processor-Accelerator SoC Generation
Loop/Function Pipelining
Resource Sharing
Target FPGA Vendors Intel, Xilinx, Lattice, Microsemi, Achronix Intel, Xilinx, Lattice, Microsemi, Achronix
Support Limited

To purchase a full license of LegUp, please contact sales@legupcomputing.com.